Join us March 18^th at 11am PDT as Datalight CEO Roy Sherrill and Wind River Product Manager Bill Graham weigh the pros and cons of switching to NAND. Maximize the usability and efficiency of your device memory by understanding all the considerations that go into integrating a NAND flash with your device’s software. Learn more and reserve your spot today as space is limited. ]]> http://blog.datalight.com/increase-capacity-reduce-cost-benefits-of-nand-flash-wind-river-and-datalight-webinar/feed 0 http://blog.datalight.com/inhand-chooses-flashfx-pro-for-fingertip-modules http://blog.datalight.com/inhand-chooses-flashfx-pro-for-fingertip-modules#comments Tue, 03 Nov 2009 22:45:16 +0000 RobHart http://blog.datalight.com/inhand-chooses-flashfx-pro-for-fingertip-modules InHand’s development platforms are known in the embedded industry for their generous list of features, fast time-to-market, and solid performance. Recently, when a customer’s unusual flash configuration began causing corruption issues related to the default flash driver on Windows CE, InHand turned to Datalight FlashFX Pro, with immediate results. The InHand team was so impressed with the ease of implementation and improved flexibility of FlashFX Pro, that they decided to include it with every Fingertip4 and Fingertip5 module they sell. Continue reading for more about InHand’sDatalight FlashFX Pro experience with .

1. Cost – Despite years of oversupply in the flash market, and the corresponding reductions in price, flash is still relatively expensive when compared to HDD, especially on a $/bit basis. To make matters worse, the current economic climate has taken its toll on the flash industry, spurring several rounds of consolidation and requiring flash vendors to curb manufacturing costs by shrinking portfolios and closing fabs. Predictably, these changes in the supply landscape are causing prices rise in many cases, making the cost factor an even bigger problem for flash.

2. Shrinking lithography = lower endurance – One way for flash manufacturers to remain competitive is to use smaller die size to reduce raw material costs. Just a couple years ago, the vast majority of NAND flash was manufactured with 90nm lithography. Most vendors are now planning to move to 30nm technology either this year or next. An unfortunate side-effect of smaller lithography is significantly decreased endurance. SLC NAND, which had 100K + erase cycles, is now predicted to be in the 50-70k range. The biggest impact is on MLC NAND where the endurance has gone from 10k erase cycles to around 3k (a 70% reduction!).

3. Increasing ECC – Another side-effect of shrinking lithography is an increase in error rates for flash, requiring stronger correction codes. Most SLC NAND flash today requires 1-bit correction. That number is predicted to increase to 4-bit on 30nm NOR parts. And the ECC outlook for MLC NAND is even worse, requiring ECCs greater than 12-bit (compared to 4-bit or 8-bit today). These increased ECC requirements mean the controller design for managing flash will become more complicated, and more difficult for OEMs to implement. Performance will also be impacted, especially if the ECC is done in software running on the host processor.

4. Vendor volatility – Churn or volatility in the flash market, the products of a difficult economic climate, are making it difficult for OEMs to find a reliable source of flash parts. Examples are everywhere; A major flash supplier is currently under Chapter 11. There are merger talks happening between SanDisk and Samsung. Asian vendors have been hit especially hard, particularly those also in the DRAM business. OEMs are rightfully concerned about interruptions to their production cycles in the midst of all this turmoil.

5. Lack of killer application – While NAND flash densities have continued to increase, the industry is still waiting for the killer application to gobble up these immense quantities of flash. For long SSDs have been viewed as that application but they have not taken off as fast as the flash industry would have liked.

In spite of the obstacles faced by the industry, flash remains a strong and growing choice for data storage and has put breakthrough devices like MP3 players and smart phones (iPhone!) into the hands of millions of consumers. Early adopters of SSD technology in laptop computers, netbooks and enterprise applications are making a solid case for mass market potential there, which should significantly drive flash adoption in the next few years. Visit the FlashFX Tera page to learn how Datalight is making flash easier and more competitive.

The following is an enumeration of some of the popular managed NAND form factors. Please note that the list covers flash technologies used for resident storage and does not cover removable storage like USB flash, SD, etc.

•    eMMC
•    eSD
•    CompactFlash
•    Solid State Drives
•    BA NAND
•    Adaptable NAND
•    Specialized
–    Specially designed controller + raw flash

CompactFlash is included here because it is used both as resident and removable storage. CF comes with a Fixed-drive option which allows it to be used a resident managed NAND.

The above technologies differ from each other on several attributes

•    Form factor – managed NAND can come is several form factors. An SSD may sport a standard 2.5” drive enclosure whereas a CF card will take a 1.0” card form factor.
•    Plug-in interface: What interface does the managed NAND use to connect to the device platform
–    MMC
–    SD
–    ATA
–    Custom
•    Cost: Cost depends on several elements
–    Type of flash used: SLC is much more expensive than MLC
–    Type of controller used: consumer grade controllers (used for consumer grade CF for example) are much cheaper than specialized industrial grade controllers
•    Performance
–    Performance varies depending on the flash type, the controller attributes and the interface.

Some of the big players in the managed NAND business are

•    eMMC
–    Micron, Numonyx
•    eSD
–    SanDisk, Toshiba
•    BA NAND
–    Toshiba
•    Solid State Drives, CompactFlash
–    Too many players in these markets

This was a brief view of the managed NAND landscape. If there is interest, we will do a follow up going in details about the specific categories and interfaces

1. Boot code is stored in raw flash (no file system) and directly accessed from bootloader
2. Boot code is stored on a Reliance formatted flash volume

Option 1: Raw flash
If the boot image is being stored in RAW flash outside the file system, then the only way to be able to ensure that you got an update without damaging the original would be to reserve extra RAW space such that you could simultaneously have two boot images. The bootloader now needs to be able to switch between them and/or locate both of them The process of updating the boot image to a new location would include erasing the old image after updating the new, and having some sort of checksum to ensure the image was intact in case both were still there.

In this case, there would be no really good way to protect the update of the file to that exact same location without compromising the boot image itself. Many customers still use this way to store their boot images, but of course this means that they can’t take advantage of disabling transactions, atomically updating the boot image, and then doing a single transaction to commit all (or none) of the changes.

Option 2: Reliance
In this case, customer would not have a bootloader that checked a physical location for a boot image – they would have a bootloader that opened a file in the Reliance file system at boot time instead, if they were using a file system. Datalight Reliance comes with an utility called “Datalight Loader” which includes a lightweight Reliance reader. This utility integrates seamlessly in your bootloader code and allows the bootloader to mount and read Reliance partitions. Since the bootloader is capable of “reading” a Reliance disk, it doesn’t care where in the file system Reliance stores the file – it just opens the file, and loads it.

In this mode, while updating the boot image, the update utility disables all transactions and initiates the boot image update. Reliance never overwrites live data and hence this new boot code is written to a free-area of the flash. Once the entire boot image code is written, the bootloader calls for a manual transaction event, in which we update the metaroots to point to the new boot code area as the committed area. Old boot code area is now marked as free and can be used for future operations.

If power loss occurs during this replacement process, the device still boots back using the previous boot image, which was never modified

It’s hard to believe that it’s been 20 years since the invention of flash memory, but the 20-foot timeline documenting its milestones that was displayed at this year’s Flash Memory Summit offered ample evidence of the progress the technology has made. Attendance at this third Summit once again broke records set by previous shows and the energy of the attendees was high. At more than 1,300 registered attendees, 2008 was at least 25% larger than 2007. Having been a sponsor since the show’s inception, we can confirm that it was even more packed this year. Most of the keynote presentations spilled out of the main hall, and people were stacked up into the hallway trying to hear what was being said inside. The quality of the presentations once again proved worth the trip to Santa Clara, but it was obvious to everyone that the show is quickly outgrowing the Santa Clara Marriott.

The unofficial theme this year appeared to be solid-state drives (SSD), but beyond the SSD buzz, there were many presentations on designing NAND-based products, software optimization of flash, future technologies, and other flash-related topics of interest. Datalight gave four presentations (Flash Interfaces 101), and organized a forum on using flash in embedded as well as a full-day “executive update.”

There were a couple of keynote addresses we found particularly interesting and entertaining:

Dean Klein from Micron gave a speech entitled, “A Closer Look at NAND Flash.” Highlights of Dean’s keynote included a map of NANDs progress through the Gartner Cycle of Hype,

Gartner Cycle of Hype – Source: Gartner Research

in which he asserted that NAND is over the “peak of inflated expectations,” heading down into the “trough of disillusionment.” Klein jokingly referred to hard-drives several times as “rotating rust,” and the address featured an entertaining series of video clips along the lines of Apple’s Mac vs. PC ads, in which Hard Drive was escorted by Flash to a therapy session to talk about his sluggishness, forgetfulness, narcolepsy, and overeating (power consumption).

Eli Harari from SanDisk gave a keynote called “Changing the World: The Flash Memory Revolution.” Eli’s speech was less humorous than Dean’s, but no less interesting to listen to. He showed several timelines describing the evolution of flash applications, and a chart predicting that NAND demand will outstrip supply by 2011, allowing flash vendors to raise prices (!) and finally get a return on their investment in the technology. He also compared the progress of NAND density to Moore’s law, showing that NAND is tracking far ahead of where Moore’s law says it should be. He theorized that the next flash technology will be 3D NAND, and gave a fascinating demonstration of how it’s built and how it works, including photographs of 3D NAND’s unique architecture.

Spansion showed their ecoRAM: basically flash in a DIMM form factor. Cool. And eco-friendly, apparently. This new class of flash promises to reduce the power requirements for large server applications, using an eighth of the energy of DRAM, with better reliability, and read performance fast enough to meet the rapid access requirements of large-scale server installations.

Which highlights another key theme of the Summit: Power. How can flash help reduce global warming? Can SSDs make data centers run more economically? Uh, did I say “data centers?” Yes, surprise! While last year’s Summit saw the invasion of the laptop, this year a significant portion of the sessions addressed opportunities in the Enterprise segment.

But the “Big E” didn’t totally eclipse the “Little e” (embedded). There is still a growing need for low power, high performance flash soldered onto boards and into removable cards for embedded systems. The embedded track had presentations ranging from the basics of flash interfaces and differences between NOR and NAND to complex design methodology and frequency sources for flash memory applications.

Speaking of last year’s Summit, where Hybrid Hard Drives (traditional hard disk drive with flash caching) battled SSDs for attention, whatever happened to the HHDs? The only sign of them we saw was a presentation from Seagate wherein they said there is still work to do, particularly on the software (i.e., Windows Vista).

Our take overall? Industry insiders’ perspectives are essential for long term planning and this show is the place to get them. But all that crystal-ball-gazing can be a bit out of phase with where customers are today. SSDs are interesting and undoubtedly will be a key component in many future designs, but the reality is that migration from NOR-only systems to those that include both NAND and NOR or just NAND continues to be the mainstay for today’s designs. An analyst from IDC cashed a reality check on the SSD hype when he put up a slide showing relative market sizes of flash memory (big), hard disk drives (huge) and SSDs (tiny).

While many flash manufacturers are in an oversupply situation on NAND, others have parts on allocation. The industry as a whole is looking for ways to reduce costs and keep (or get) fabs profitable. This causes lower volume, lower margin product lines to be discontinued, sometimes just as designs using them are about to go to market.

Bottom line? The Flash Memory Summit provides a great opportunity to step outside our day-to-day reality and consider the possibilities promised by emerging technology. Next year’s Summit is sure to be a must-attend event for gaining planning perspective. We hope to see you there!

If you missed the Summit, presentations should be available soon at www.FlashMemorySummit.com. Bill’s presentation on flash interfaces, complete with narration, is available now: Flash Interfaces 101

A Short Study on Wear‑Leveling

Over the past fifteen years, flash memory has been widely adopted in mainstream consumer grade products having short lifetimes, often measured in months. In recent years however, flash memory has begun to break into more industrial and commercial grade devices with lifetimes counted in years. There are many unique characteristics of flash memory that have fueled its growth across these varying market segments, such as its ability to retain data without continued power; this benefit, however, comes at a cost of a finite lifetime and endurance. The hardware architecture and software technologies that extend the life of a flash chip are often ill‑considered or, at times, given more worry than necessary. While the limited lifetime of flash memory may or may not be problematic for products that are expected to last ten or more years, flash management software can expand the breadth of available flash parts for your project.

This paper focuses on determining when the limitations of flash memory lifetime become significant and what can be done about them.

Flash Lifetime Metrics

Flash memory lifetimes are described in two primary metrics which are generally touted on the first page of any flash memory manufacturers’ data sheets:

• Data retention
• Endurance cycles

Data retention is often listed at 20 years at a given operating temperature. Increased temperature ranges reduce the data retention period which further decrease as the flash memory is used at or near its specified operating temperatures. It is important to note that data retention is measured from the time data is successfully programmed.

The second metric, endurance cycles, is a measure of the number of write and erase cycles that the flash memory can endure before becoming unreliable. Flash memories are organized into a number of erase blocks or sectors and each must be erased prior to writing data. A typical erase block is 128KB in size, however may range from 512B to 2,048KB or even more. Any given address within an erase block cannot be rewritten without an intervening erase. Erase cycles are cumulative and affect only those erase blocks being cycled. In other words, an error in any erase block is constrained to the data of that block.

Erase cycles range from 1,000 to 1,000,000. While these ranges have an order of magnitude difference, it is the application the flash is placed into that will primarily define the product lifetime.

What is Wear-Leveling?

Wear‑leveling is a process to ensure that an entire flash memory device or an array of devices is used in a uniform fashion in order to extend the overall lifetime of the flash.

For a simplistic example of wear-leveling, let’s look at a data recorder device with the following characteristics:

• Application: The device collects and stores the past 24 hours of field data by simply writing and rewriting the data to the same location on the flash.
• File size of data to be recorded: 128KB
• Erase block size (of the flash): 128KB
• Flash memory endurance: 1,000 cycles

With one spare area, the device is assumed one cycle per day each year:

(1,000 cycles ÷ 365 days) * 1 spare area = 2.74 years

In this example, it would take about 2.74 years to cycle that one erase sector 1,000 times.

For the data recorder device to accommodate the write‑erase rules of flash memory, it would have to complete an erase operation to start writing the next day’s set of data. To make the data recorder more robust – to ensure that it doesn’t lose a whole day’s worth of data – we can set aside a second erase block, and erase the first block only after the second set of data was recorded. The resulting side effect is the introduction of a simple wear-leveling scheme.

With two spare areas, the device is assumed one cycle every two days each year:

(1,000 cycles ÷ 365 days) * 2 spare areas = 5.48 years

With these parameters, the period of time prior to cycling the flash to its lifetime has just been increased to almost 5.5 years!

This simple example shows how distributing a fixed set of writes across more flash sectors can increase the period of time prior to cycling the flash to its specified limits. The following sections describe how to account for the important variables associated with wear-leveling techniques, and determine the expected lifetime of the flash in any application.

Continue: A Short Study on Wear-Leveling