Today we are announcing an update to our flash memory manager (FlashFX Pro) and file system (Reliance) products. The official press release will go on the wire shortly, but we wanted our blog audience to know about it first.

Here are the highlights on this release

FFXP  3.3.2
1.    Improved product reliability: This release includes number of bug fixes and product enhancements that improve the reliability of the product
2.    Support for CFI compliant NOR flash parts
3.    FlashFX Pro supports 200+ flash parts and with each release we add support for new flash parts from the top flash vendors. New Flash parts supported in this release include Spansion NS-P, Samsung FlexOneNAND and Micron 55nm parts
4.    VxWorks: Support added for VxWorks version 6.6.

5.    RTOS: Support for the Mentor Graphics Nucleus and ThreadX operating systems has been mainstreamed into the RTOS Porting Kit.

6.    WinCE: Support added for Windows CE 6 R2

Reliance 3.2.2

1.    Improved product reliability: This release includes number of bug fixes and product enhancements that improve the reliability of the product
2.    Datalight Loader, includes a read-only version of Reliance with a  very small footprint that allows bootloaders to load OS image from Reliance partitions. This allows devices to benefit from Reliance’s application controlled transaction point feature by enabling “in-place OS upgrades”. Contact Datalight support (support@datalight.com) to get more details on how to use Datalight Loader in your design

The entire press release is included below

FOR IMMEDIATE RELEASE

Datalight News

For information, contact:
Kerri McConnell, Director of Marketing
425.686.1069
kerri.mcconnell@datalight.com

New Datalight Products Support Microsoft Windows CE 6 R2 and Wind River VxWorks 6.6

Bothell, Wash., – June 26, 2008 – Datalight announced today that it has released new versions of its Reliance® and FlashFX™ Pro products, with support for Windows CE 6 R2 and VxWorks 6.6. The new versions feature enhancements in reliability, as well as support for a wide range of new flash parts. FlashFX Pro now supports Spansion NS-P, Samsung FlexOneNAND, Micron 55nm, and all CFI-compliant NOR parts.

A new feature for Reliance, the Datalight Loader now includes a read-only version of Reliance. This small footprint version permits a bootloader to load an OS image directly from a Reliance partition. Devices benefit from risk-free “in-place OS upgrades” enabled by the application-controlled transaction point feature of Reliance.

The Datalight flash file system solution is comprised of the Reliance file system and FlashFX™ Pro intelligent flash media manager. Reliance was designed from the ground up for high reliability applications. Dynamic Transaction Point™ technology provides 100% immunity from file corruption, even after unexpected system interruption. Embedded applications can benefit from faster boot times that remain consistent for the life of the product, regardless of disk size. FlashFX™ Pro features pre-written support for over 200 flash parts, works with virtually any NAND controller, and features wear leveling, bad block management, and background compaction for unrivaled performance. Datalight flash file system products are also available on Linux and other operating systems.

About Datalight

Datalight, Inc. headquartered just north of Seattle, Wash., develops technologies to enable risk-free mobile data. Datalight file system and device driver software ensures reliability, performance and flexibility, and is used worldwide on many of today’s most well-known devices.  For more information, visit http://www.datalight.com/, call 800.221.6630 or visit blog at http://blog.datalight.com

Reliance and Dynamic Transaction Point are trademarks of Datalight Inc. Other marks used herein are the property of the respective owners.

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Copyright © 2008 Datalight, Inc. All rights reserved. Printed in USA. DATALIGHT, Datalight, the Datalight Logo, FlashFX, FlashFX Pro, Reliance, ROM-DOS, 4GR, One-Boot, One-Boot+File, and Sockets are trademarks or registered trademarks of Datalight, Inc. All other product names are trademarks of their respective holders. Specification and price change privileges reserved.

The read, write and erase timing characteristics of flash hardware specifications are useful for comparing different products, but don’t tell the whole story about what you will get from your real-world devices. When Flash memory is incorporated into a system, the performance of the system depends on a number of factors. One key factor that can reduce the effective performance of flash memory involves the shared bus topology of your system. Optimal flash performance depends on the speed and availability of the bus that connects the flash to the system. Also critical are the manner in which the operating system handles interrupts and whether the flash device is connected to the system’s interrupt architecture.

The published read, write, and erase timing characteristics of flash hardware specifications are useful for comparing different products, but don’t tell the whole story about what you will get from your real-world devices. When Flash memory is incorporated into a system, the performance of the system depends on a number of factors in addition to the capabilities of the flash hardware.

One key factor that can reduce the effective performance of flash memory involves the shared bus topology of your system. Optimal flash performance depends on the speed and availability of the bus that connects the flash to the system. For example, if your flash shares a bus with parts that operate at slower clock speeds, the timing of the accesses to the flash part may be extended to match. On the other hand, your flash part may be competing for bus availability with other demanding high-speed system components.

RAM memory, network interfaces, and LCD screens are demanding components that can compete with flash for bus and CPU bandwidth. The use of certain features of the processor and operating system, such as DMA and caching, can have a similar impact. As more components, peripherals, and device drivers are added to the system, more opportunities arise for the bus to be shared. The proliferation of high performance audio and video features, now common on mobile devices, can further tax a shared bus system on a general purpose chipset. For this reason special-purpose chipsets designed for a specific application, as well as tuning the characteristics of your flash management software to meet your specific needs, will generally enable higher levels of flash performance.

Well designed hardware bus topology can alleviate the issue of shared bus contention, yet other factors may still impact flash memory performance. Even if the flash part has full speed access to the processor’s external bus, the availability of the CPU to service that bus is still a question. Bus arbitration may take CPU cycles away from the flash bus in favor of other system busses or internal accesses. Operating system timer interrupts and other peripheral device driver interrupts can interfere with flash software operations, as can a CPU that is simply overloaded by running complex applications.

Also critical are the manner in which the operating system handles interrupts and whether the flash device is connected to the system’s interrupt architecture. Some flash is connected to processors in such a way that the signal generated by the flash is connected to a GPIO, or not connected at all. This may have little impact on flash performance, but it will limit the ability of the CPU to execute other flash-related software, such as garbage collection, or even unrelated tasks. Additionally, many systems have an explicit or implied interrupt priority that must be considered at the system level. Responsiveness requirements of all interrupt-driven components in the system must be carefully weighed against the desire to maximize flash performance.

An equally significant factor affecting flash performance that might be easily overlooked is the flash management software itself. There is a necessary amount of overhead inherent in running software to manage your flash memory, and there are some complex operations that the software needs to accomplish well in order to optimize flash performance. The software provided by your flash vendor may or may not provide satisfactory performance for your particular application.

While flash memory often appears to the end user like a virtual hard drive, the underlying technology is quite different and presents certain challenges. Flash management software can do more than bad block management and wear leveling, it can increase the effective performance of the flash part by addressing these challenges:

1. Flash performance can be impeded by the need for a slow erase operation before writing new data, but software that intelligently performs background garbage collection during idle time can solve that problem.
2. Fragmented data can degrade performance in applications such as streaming media from NAND memory, but compaction software that de-fragments the data can improve performance in these situations.
3. With some algorithms, throughput is maximized for performance until a percentage of the flash memory is used, at which point performance can degrade. The percentage of the flash that is used before performance suffers can be tuned in some implementations, by allowing the system designer to reserve a specified amount of ‘cushion’ of unused memory.
4. In some solutions, maintenance operations such as garbage collection can preempt high-priority read requests. Implementations that make careful use of multithreading operating systems’ capabilities to manage this issue can reduce read latency by orders of magnitude.

Several factors will affect the performance of flash memory in your real-world system, some of which may be beyond your control. Chipset hardware and system bus topology decisions may have been made already. No matter whether your hardware is specially designed for your application or you are using a general-purpose hardware design, though, the effective performance of your flash memory can be improved through software methods. Datalight FlashFX is a multithreading memory management software solution that enables garbage collection, data compaction, memory cushion, and high priority read interrupts to allow the highest real-world flash performance your hardware configuration can support.

Linux has been slowly but surely establishing itself as the predominant OS in the embedded industry. ABI research report suggested that 23% of Smartphones will be based on Linux by 2013. High-profile industry support from Android and the LiMo foundation has put the spotlight back on embedded Linux.

In a previous post, we talked about flash memory and the various layers of flash management. In this post, I will talk about JFFS2, the most popular flash file systems available on the Linux platform

JFFS2

The Journaling Flash File System version 2 (JFFS2) is a log-structured file system that was originally designed in 1999. The original JFFS was developed by Axis Communications (and later enhanced by Red Hat) to provide support for NOR flash devices. The current version has been updated to include support for NAND flash. JFFS2 is open-source software, distributed under the terms of GPL license.

JFFS2 Strengths

1. Portability to Development Environments: Included with the Linux kernel since version 2.4.10, JFFS2 has become a de facto standard flash file system for Linux developers. Today, it is included in most commercial Linux distributions (such as MontaVista and Wind River Linux). Because of this wide distribution and use, it has been integrated into many varying environments and is known to be relatively easy to build.

2. Reliability: As changes are made to the file system, a “log” is built; this log provides information about where a file and its associated metadata are located on the flash chip.^[1] As the log is consistently maintained, it will be read back in the event of an unexpected power loss to determine the location of a missing file. Although the log structure provides a level of data reliability, this is accomplished at a cost to performance

3. Support for disk-wide compression: The benefit, or cost, of using compression depends on each specific use case. Compression will be useful in making efficient use of disk space when several text-only or code data (OS, etc.) files are being stored. Media files are already compressed (in *.jpg, *.mpg, or other formats), so the time used to attempt data compression is wasted. It is even possible that media files may take up more space after an unnecessary compression than originally needed. Disk usage and performance for the type and number of files to be maintained must be considered by the device designer in order to determine whether compression will yield a benefit or not

JFFS2 Shortcomings

1. Resource usage: RAM usage by JFFS2 increases in linear proportion to the number of nodes. Hence on large flash volumes, the system resources required by JFFS2 can be very significant

2. System performance: For devices that primarily use the file system for read operations, JFFS2 performance may be acceptable. However, for multi-functional devices whose applications perform a continuous mix of read and write operations, it is likely that the performance of a system using JFFS2 will not pass a rigorous standard. In addition to slow writes, the flash disk mount times of JFFS2 are exceptionally slow and worsen as the amount of data stored increases. Upon start-up after an unexpected power failure, JFFS2 must reconstruct the file system structure from the log. This is a costly operation that requires several seconds – more for volumes that are large or near-capacity. The device will be halted during this check operation, as any data that is stored on the disk will not be ready for use until the start-up completes

Informative links on JFFS2

1. JFFS2 Technical paper [PDF]

2. JFFS2 RAM usage [ppt] – Presentation at Embedded Linux Conf 2007

In the next post in this series, we will look at another popular Linux flash file system – YAFFS.

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[1] Details on JFFS2 log structure can be found here http://sourceware.org/jffs2/jffs2-slides-transformed.pdf

NAND flash is everywhere these days. The iPod Nano, usb flash drives and various other flash card-based devices like GPS navigators, digital cameras and smart phones have brought high-density NAND to the mainstream. What most users don’t realize however, is that NAND storage, though “solid-state,” relies on a fragile and inherently-flawed technology to store all those bits and bytes. Enter the NAND controller, a relatively small piece of software that renders NAND errors virtually invisible to the end user, making your iPod and other devices work like a champ. To learn more about NAND controllers, read our whitepaper on the topic:

An Overview of NAND Flash Memory Controllers

The demand for NAND Flash memory is growing at a phenomenal rate. In 2005, worldwide revenue for NAND Flash rose to $10.8 billion, up 60% from 2004. The inclusion of NAND Flash in an increasing number of MP3 players, high-end cell phones, and digital cameras has fueled expectations that NAND will overtake NOR in a number of markets. Rapid increases in the capacity of NAND Flash, coupled with mobile consumer products that demand ever-increasing amounts of data storage, lay out a very bright future for this technology in the coming years.

What is NAND Flash?

NAND Flash is a form of non-volatile memory introduced by Toshiba and Samsung in 1989. Its benefits include high storage density, fast access times, low power requirements in operation, and excellent shock resistance. These benefits are tempered somewhat by the inherent limitations of the technology:

• Due to production yield constraints, NAND Flash ships from the factory with a number of bad blocks that cannot be used.
• NAND Flash has a serialized data interface similar to a hard disk and so cannot be used for execute in place functionality, such as running code directly from the chip.
• Over time and after multiple erase cycles the memory will tend to “wear” and become less reliable.
• The bits stored in the chip can sometimes flip - or reverse - from 0 to 1 or vice versa.

Over time, NAND Flash technology and software has evolved to the point where these limitations are invisible to the end user. Owners of iPod Nanos do not overly concern themselves with bad blocks or bit-flipping.

What does a NAND controller do?

Increased Performance

Approximately 3% of the overall flash array is reserved as a “spare area” in order to cope with flash vulnerabilities, like bit-flipping and bad blocks. Approximately 3 to 6 bytes in the spare area are reserved for error detection and correction algorithms, while the remainder of the spare area is used for remapping bad blocks. Without a NAND controller the algorithms that handle these functions would be executed by the general purpose CPU. However, NAND controllers are available that will perform these functions in hardware. This reduces the CPU load on the device which has the effect of increasing battery life as well as increasing performance – both important factors in mobile technology. In addition, the advent of Multi-Level Cell (MLC) NAND Flash Technology requires even more rigorous error detection algorithms due to the increased chance of an error occurring. A NAND controller is perhaps the only reasonable way of performing this task.

NAND controllers can implement read and write caching and transfer data to and from the NAND Flash chip independently of the general purpose CPU. This increases the overall throughput and can again reduce the load on the system.

Faster Integration

The serialized data interface to NAND presents a difficult scenario for transferring data in and out of the chip. Unlike other memory technologies, like NOR or DRAM, an address must be fed in a bit at a time, at just the right time, and then read or write the actual data in a similar fashion. A NAND controller encapsulates the interface with the NAND chip and handles this communication, thereby presenting an effortless interface to the user.

The lack of standardization among NAND Flash manufacturers has been problematic throughout its brief history. The use of NAND controllers allows some flexibility in the choice of a NAND Flash chip as any given controller will support a range of NAND chips. Changes in NAND Flash, therefore, will not necessarily require a change in NAND controller or software.

Integrated NAND Controllers

Integrated NAND controllers are growing in popularity as mobile processor vendors, such as Freescale and Texas Instruments, build NAND controllers directly into their processors. The advantages of this approach are that the design can be kept small and the costs can be minimized. The disadvantage is the inevitable delay between a new NAND Flash technology appearing and the release of an integrated processor that supports it.

A dedicated, or external, NAND controller is one in which the NAND controller is a separate chip that can be sourced independently of other parts. The advantage of choosing a dedicated NAND controller is the wide range of latest and greatest NAND Flash chips available. This is due to the relatively short time to market for a chip with this level of complexity. The disadvantage of using a dedicated NAND controller is that chip uses additional PCB space and will cost more money than the integrated approach.

Specialized NAND Controller Software

The diagram below shows an overview of the interaction between the embedded application, file system, Flash management software, NAND controller, NAND controller driver, and the NAND Flash memory chip.

NAND Controllers require specialized software to hide the unpleasant details of the NAND controller and NAND Flash itself and presents the user with a clean and highly usable interface to the memory.

At a higher level, the NAND controller driver is often utilized by an intelligent block device driver, such as FlashFX Pro from Datalight, or a flash file system. Some important functions of this software are:

• Reducing the integration time for developers of embedded applications.
• Handling bad blocks present on the NAND Flash chip.
• Providing small block emulation, which is required due to the relatively large “erase blocks” present on NAND Flash.
• Mitigating the effects of wear on the NAND flash through the application of wear leveling algorithms that spread writes and erases over a wider area.
• Providing a file system interface that allows you to interact with the Flash chip at the file level.

Summary

The strong desire for more storage and better performance in consumer devices has elevated the pressure on NAND Flash and introduced new technologies like NAND Controllers to device engineers.  In order for new flash technologies to be adopted, it is critical that the enabling software also continues to evolve.

Flash memory has established itself as the technology of choice for device data storage on embedded devices. The advantages it brings in terms of storage capacity, I/O throughput, power consumption and board space savings are significant. In 2007, flash memory was a $7.7 billion industry. Analysts predict a 23% growth of the flash memory market between 2007 and 20111; surpassing the history-making growth of DRAM ten times over.

One of the barriers to flash memory adoption is its perceived complexity of integration into a product design. With the flash memory market branching to multiple product lines beyond traditional NAND and NOR devices, this perception, along with a concern about the reliability of flash, is becoming magnified. Basic flash management software can lessen the complexity of integration, and sophisticated flash software can ensure the optimum lifetime and reliability of a flash device.

The challenges of integrating flash memory are broad, including operations from the seemingly simple – like reading, writing, and overwriting data – to the exceedingly complex – such as bad block management and wear-leveling. When flash memory is not accompanied by an intelligent software manager, the system will suffer from slow reads and writes, data corruption, and a short usable life.

There has been a lot of interpretations for the term “Flash File System”. Some consider it as the combination of flash management software and a block file system. For some it is just the flash management piece. The following diagram shows the different layers involved in managing data on flash memory and the corresponding terminologies for software components

· Flash Driver: Basic software that provides rudimentary read/write access to flash; this software is often acquired from the chip provider, and is usually part-specific.

· Flash Manager: In addition to the functionality of a flash driver, a flash manager also intelligently determines which part is being used, and handles it accordingly – whether it is NAND, NOR, or a fusion of the two (i.e. Samsung OneNAND, or Spansion ORNAND). Bad block management, wear-leveling, garbage collection, and error detection and correction are features that a flash manager provides. A flash manager may also be designed to take advantage of unique performance or technical characteristics a specific part provides. Flash managers are sometimes referred to as FTL (flash translation layers).

· Flash File System: Contains the flash driver and the flash manager aspects, but also incorporates a file system that is designed for use with flash memory. In the way of performance optimizations, a flash file system includes a discard interface which ensures that erased blocks are immediately available for use by both the file system and the flash manager without additional queries to those blocks.

The following diagram shows the flash file system in perspective of an embedded device

Hope this post was useful in understanding the layers of flash management. In the next post in the series, we will look at various flash file systems for one of the most talked-about embedded OS – Linux.

Hi All:

Welcome to the Datalight blog on “Data Matters”.   It’s amazing to see the increase in size and value of data in devices over 25 years that Datalight has been in business.   In the old days, well the 80’s, Datalight worked with Flight Data recorders that held data on 3.5 inch floppies using the FAT file system and  similar non-reliable foundations.  Today, device data requirements are growing at a tremendous pace. These requirements include reliability, performance, size and flexibility in media, bootability and system field-update requirements.

On the consumer front, the spectrum moves from the inexpensive GO Phone, up to the Feature phones (with multimedia capabilities) toward the Smartphones that can assume the role of a MP3 Player, a movie Player or an office management system for the road warrior.

The more demanding embedded devices hold data that is much more valuable, sensitive, and mission critical.  These devices succeed or fail based on how they handle, store and deliver the data to the final data consumer.

There many “Good Enough” solutions that, well, aren’t really “Good Enough”!     Datalight is committed to Risk Free Device Data, and that’s what this Blog is all about.   If you require more than “Good Enough” for your device data, then keep reading.

Thanks for joining us!

Roy Sherrill
President